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EMC1422
1C Temperature Sensor with Hardware Thermal Shutdown
PRODUCT FEATURES
General Description
The EMC1422 is a high accuracy, low cost, System Management Bus (SMBus) temperature sensor. Advanced features such as Resistance Error Correction (REC), Beta Compensation (to support CPU diodes requiring the BJT/transistor model including 45nm, 65nm and 90nm processors) and automatic diode type detection combine to provide a robust solution for complex environmental monitoring applications. Additionally, the EMC1422 provides a hardware programmable system shutdown feature that is programmed at part power-up via two pull-up resistor values and that cannot be masked or corrupted through the SMBus. Each device provides 1 accuracy for external diode temperatures and 2C accuracy for the internal diode temperature. The EMC1422 monitors two temperature channels (one external and one internal). Resistance Error Correction automatically eliminates the temperature error caused by series resistance allowing greater flexibility in routing thermal diodes. Beta Compensation eliminates temperature errors caused by low, variable beta transistors common in today's fine geometry processors. The automatic beta detection feature monitors the external diode/transistor and determines the optimum sensor settings for accurate temperature measurements regardless of processor technology. This frees the user from providing unique sensor configurations for each temperature monitoring application. These advanced features plus 1C measurement accuracy provide a low-cost, highly flexible and accurate solution for critical temperature monitoring applications.
Datasheet
Applications
Notebook Computers Desktop Computers Industrial Embedded applications
Features
Hardware Thermal Shutdown
-- triggers dedicated SYS_SHDN pin -- hardware configured range 77C to 112C in 1C steps -- cannot be disabled or modified by software
Support for diodes requiring the BJT/transistor model Designed to support 45nm processors Support for 90nm and 65nm CPU diodes Pin compatible with ADM1032, MAX6649, and LM99 Automatically determines external diode type and optimal settings Resistance Error Correction External Temperature Monitors
-- 1C Accuracy (60C < TDIODE < 100C) -- 0.125C Resolution -- Supports up to 2.2nF diode filter capacitor
Internal Temperature Monitor
-- 2C accuracy
3.3V Supply Voltage Programmable temperature limits for ALERT Small 8-pin MSOP Lead-free RoHS Compliant Package
EMC1422 Pin Description
VDD 1 DP 2 DN 3 SYS_SHDN 4
8 7 6 5
SMCLK SMDATA ALERT GND
SMSC EMC1422
DATASHEET
Revision 1.24 (02-05-08)
1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
ORDER NUMBER:
EMC1422-1-ACZL-TR FOR 8 PIN, MSOP LEAD-FREE ROHS COMPLIANT PACKAGE
Note: See Table 1.1, "Part Selection" for SMBus addressing options.
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright (c) 2008 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC's website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation ("SMSC"). Product names and company names are the trademarks of their respective holders. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.24 (02-05-08)
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SMSC EMC1422
DATASHEET
1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
Table of Contents
Chapter 1 Block Diagram
1.1
...................................................7
Part Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Chapter 2 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Chapter 3 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1 3.2 3.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 SMBus Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Chapter 4 System Management Bus Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 System Management Bus Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Read Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Send Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receive Byte. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Alert Response Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMBus Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMBus Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 12 13 13 13 13 14 14
Chapter 5 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1 5.2 5.3 5.0.1 Conversion Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0.2 Dynamic Averaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SYS_SHDN Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Hardware Thermal Shutdown Limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ALERT Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.1 ALERT Pin Interrupt Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.2 ALERT Pin Comparator Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ALERT and SYS_SHDN Pin Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Beta Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Resistance Error Correction (REC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diode Faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Consecutive Alerts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Monitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Measurement Results and Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Diode Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 15 16 17 17 18 18 18 19 19 19 19 20 21 22 23
5.4 5.5 5.6 5.7 5.8 5.9 5.10 5.11 5.12
Chapter 6 Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 6.11 6.12 Data Read Interlock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Conversion Rate Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scratchpad Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Therm Limit Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Diode Fault Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Software Thermal Shutdown Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Hardware Thermal Shutdown Limit Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Channel Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
26 26 26 27 28 28 29 29 30 30 31 31
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1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
6.13 6.14 6.15 6.16 6.17 6.18 6.19 6.20
Consecutive ALERT Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . High Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Low Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . THERM Limit Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Filter Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMSC ID Register (FEh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Revision Register (FFh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
31 33 33 34 34 35 35 35
Chapter 7 Typical Operating Curves. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Chapter 8 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
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DATASHEET
1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
List of Figures
Figure 4.1 Figure 5.1 Figure 5.2 Figure 5.3 Figure 5.4 Figure 5.5 Figure 5.6 Figure 5.7 Figure 8.1 SMBus Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Diagram for EMC1422 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Diagram of Hardware Thermal Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Isolating ALERT and SYS_SHDN Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Filter Step Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Filter Impulse Response. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Diagram of Temperature Monitoring Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diode Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin MSOP / TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 15 17 18 20 21 22 23 38
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DATASHEET
1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
List of Tables
Table 1.1 Part Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 2.1 EMC1422 Preliminary Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 3.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3.2 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3.3 SMBus Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 4.1 Protocol Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 4.2 Write Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 4.3 Read Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 4.4 Send Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 4.5 Receive Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 4.6 Alert Response Address Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 5.1 Supply Current vs. Conversion Rate for EMC1422 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 5.2 SYS_SHDN Threshold Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 5.3 EMC1422 Temperature Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 6.1 Register Set in Hexadecimal Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 6.2 Temperature Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 6.3 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 6.4 Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 6.5 Conversion Rate Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 6.6 Conversion Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 6.7 Temperature Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 6.8 Scratchpad Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 6.9 Therm Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 6.10 External Diode Fault Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 6.11 Software Thermal Shutdown Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 6.12 Hardware Thermal Shutdown Limit Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 6.13 Channel Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 6.14 Consecutive ALERT Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 6.15 Consecutive Alert / THERM Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 6.16 High Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 6.17 Low Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 6.18 THERM Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 6.19 Filter Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 6.20 Filter Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 6.21 Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 6.22 Manufacturer ID Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 6.23 Revision Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
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DATASHEET
1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
Chapter 1 Block Diagram
VDD
SYS_SHDN Limit
EMC1422
Switching Current Limit Comparator Conversion Rate Register
ADC
DP1 Internal Temperature Register
High Limit Registers
DN1
Internal Temp Diode Configuration Register Status Registers Interupt Masking
SMBus Interface
Analog Mux
Digital Mux
External Temperature Register(s)
Digital Mux
Low Limit Registers
SMCLK SMDATA ALERT SYS_SHDN GND
1.1
Part Selection
The EMC1422 device configuration is highlighted below.
Table 1.1 Part Selection
FUNCTIONALITY DIODE 2 DEFAULT CONFIGURATION N/A
PART NUMBER EMC1422 - 1
SMBUS ADDRESS 100_1100b
EXTERNAL DIODES 1
DIODE 1 DEFAULT CONFIGURATION Detect Diode w/ REC enabled
OTHER Software programmable and maskable High Limit Software programmable and maskable SYS_SHDN Limit Hardware set SYS_SHDN Limit on External Diode 1
PRODUCT ID 22h
SMSC EMC1422
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DATASHEET
1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
Chapter 2 Pin Description
Table 2.1 EMC1422 Preliminary Pin Description PIN NUMBER 1 2 3 4 VDD DP DN SYS_SHDN NAME FUNCTION Power supply External diode positive (anode) connection External diode negative (cathode) connection Active low System Shutdown output signal - requires pull-up resistor which selects the Hardware Thermal Shutdown Limit Ground Active low digital ALERT output signal - requires pull-up resistor, SMBus Data input/output SMBus Clock input Power AIO AIO OD TYPE
5 6 7 8
GND ALERT SMDATA SMCLK
Power OD DIOD DI
The pin types are described below: Power - these pins are used to supply either VDD or GND to the device. AIO - Analog Input / Output. DI - Digital Input. OD - Open Drain Digital Output. DIOD - Digital Input / Open Drain Output.
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Chapter 3 Electrical Specifications
3.1 Absolute Maximum Ratings
Table 3.1 Absolute Maximum Ratings DESCRIPTION Supply Voltage (VDD) Voltage on SMDATA and SMCLK pins Voltage on any other pin to Ground Operating Temperature Range Storage Temperature Range Lead Temperature Range Package Thermal Characteristics for MSOP-8 Thermal Resistance (j-a) ESD Rating, All pins HBM 140.8 2000 C/W V RATING -0.3 to 4.0 -0.3 to 5.5 -0.3 to VDD +0.3 -40 to +125 -55 to +150 Refer to JEDEC Spec. J-STD020 UNIT V V V C C
Note: Stresses at or above those listed could cause permanent damage to the device. This is a stress rating only and functional operation of the device at any other condition above those indicated in the operation sections of this specification is not implied. When powering this device from laboratory or system power supplies, it is important that the Absolute Maximum Ratings not be exceeded or device failure can result. Some power supplies exhibit voltage spikes on their outputs when the AC power is switched on or off. In addition, voltage transients on the AC power line may appear on the DC output. If this possibility exists, it is suggested that a clamp circuit be used.
3.2
Electrical Specifications
Table 3.2 Electrical Specifications VDD = 3.0V to 3.6V, TA = -40C to 125C, all typical values at TA = 27C unless otherwise noted.
CHARACTERISTIC
SYMBOL
MIN
TYP
MAX
UNITS
CONDITIONS
DC Power Supply Voltage Supply Current VDD IDD 3.0 3.3 430 930 1120 3.6 850 1200 V uA uA uA 1 conversion / sec, dynamic averaging disabled 4 conversions / sec, dynamic averaging enabled > 16 conversions / sec, dynamic averaging enabled
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Table 3.2 Electrical Specifications (continued) VDD = 3.0V to 3.6V, TA = -40C to 125C, all typical values at TA = 27C unless otherwise noted. CHARACTERISTIC SYMBOL MIN TYP MAX UNITS CONDITIONS
Internal Temperature Monitor Temperature Accuracy 0.25 1 2 Temperature Resolution 0.125 C C C 0C < TA < 100C -40C < TA < 125C
External Temperature Monitor Temperature Accuracy 0.25 0.5 Temperature Resolution Conversion Time all Channels Capacitive Filter tCONV CFILTER 0.125 190 2.2 2.5 1 2 C C C ms nF EMC1422, default settings Connected across external diode +20C < TDIODE < +110C 0C < TA < 100C -40C < TDIODE < 127C
ALERT and SYS_SHDN pins Output Low Voltage Power up time VOL 0.4 15 V ms ISINK = 8mA Temp selection read Note 3.1
Note 3.1
During the power up time, SMBus communication is permitted, however the SYS_SHDN and ALERT pins must not be pulled low.
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3.3
SMBus Electrical Characteristics
Table 3.3 SMBus Electrical Specifications VDD = 3.0V to 3.6V, TA = -40C to 125C, all typical values are at TA = 27C unless otherwise noted.
CHARACTERISTIC
SYMBOL
MIN
TYP
MAX
UNITS
CONDITIONS
SMBus Interface Input High Voltage Input Low Voltage Input High/Low Current Hysteresis Input Capacitance Output Low Sink Current CIN IOL 8.2 VIH VIL IIH / IIL 420 5 15 SMBus Timing Clock Frequency Spike Suppression Bus free time Start to Stop Hold Time: Start Setup Time: Start Setup Time: Stop Data Hold Time Data Setup Time Clock Low Period Clock High Period Clock/Data Fall time Clock/Data Rise time Capacitive Load fSMB tSP tBUF tHD:STA tSU:STA tSU:STP tHD:DAT tSU:DAT tLOW tHIGH tFALL tRISE CLOAD 1.3 0.6 0.6 0.6 0.3 100 1.3 0.6 300 300 400 10 400 50 kHz ns us us us us us ns us us ns ns pF Min = 20+0.1CLOAD ns Min = 20+0.1CLOAD ns per bus line 2.0 -0.3 VDD 0.8 5 V V uA mV pF mA SMDATA = 0.4V 5V Tolerant 5V Tolerant Powered or unpowered TA < 85C
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Chapter 4 System Management Bus Interface Protocol
4.1 System Management Bus Interface Protocol
The EMC1422 communicates with a host controller, such as an SMSC SIO, through the SMBus. The SMBus is a two-wire serial communication protocol between a computer host and its peripheral devices. A detailed timing diagram is shown in Figure 4.1 For the first 15ms after power-up the device may not respond to SMBus communications.
.
TLOW
THIGH
THD:STA TSU:STO
SMCLK
THD:STA
TRISE
TFALL
THD:DAT
TSU:DAT
TSU:STA
SMDTA
TBUF
P
S
S - Start Condition
S
P - Stop Condition P
Figure 4.1 SMBus Timing Diagram The EMC1422 is SMBus 2.0 compatible and support Send Byte, Read Byte, Write Byte, Receive Byte, and the Alert Response Address as valid protocols as shown below. All of the below protocols use the convention in Table 4.1.
Table 4.1 Protocol Format DATA SENT TO DEVICE # of bits sent DATA SENT TO THE HOST # of bits sent
Attempting to communicate with the EMC1422 SMBus interface with an invalid slave address or invalid protocol will result in no response from the device and will not affect its register contents. Stretching of the SMCLK signal is supported, provided other devices on the SMBus control the timing.
4.2
Write Byte
The Write Byte is used to write one byte of data to the registers as shown below Table 4.2:
Table 4.2 Write Byte Protocol SLAVE ADDRESS 7 REGISTER ADDRESS 8
12
START 1
WR 1
ACK 1
ACK 1
REGISTER DATA 8
ACK 1
STOP 1
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4.3
Read Byte
The Read Byte protocol is used to read one byte of data from the registers as shown in Table 4.3.
Table 4.3 Read Byte Protocol
START SLAVE ADDRESS WR ACK REGISTER ADDRESS ACK START SLAVE ADDRESS RD ACK REGISTER DATA NACK STOP
1
7
1
1
8
1
1
7
1
1
8
1
1
4.4
Send Byte
The Send Byte protocol is used to set the internal address register pointer to the correct address location. No data is transferred during the Send Byte protocol as shown in Table 4.4.
Table 4.4 Send Byte Protocol SLAVE ADDRESS 7 REGISTER ADDRESS 8
START 1
WR 1
ACK 1
ACK 1
STOP 1
4.5
Receive Byte
The Receive Byte protocol is used to read data from a register when the internal register address pointer is known to be at the right location (e.g. set via Send Byte). This is used for consecutive reads of the same register as shown in Table 4.5.
Table 4.5 Receive Byte Protocol SLAVE ADDRESS 7
START 1
RD 1
ACK 1
REGISTER DATA 8
NACK 1
STOP 1
4.6
Alert Response Address
The ALERT output can be used as a processor interrupt or as an SMBus Alert. When it detects that the ALERT pin is asserted, the host will send the Alert Response Address (ARA) to the general address of 000_1100b. All devices with active interrupts will respond with their client address as shown in Table 4.6.
Table 4.6 Alert Response Address Protocol ALERT RESPONSE ADDRESS 7
START 1
RD 1
ACK 1
DEVICE ADDRESS 8
NACK 1
STOP 1
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The EMC1422 will respond to the ARA in the following way: 1. Send Slave Address and verify that full slave address was sent (i.e. the SMBus communication from the device was not prematurely stopped due to a bus contention event). 2. Set the MASK bit to clear the ALERT pin. APPLICATION NOTE: The ARA does not clear the Status Register and if the MASK bit is cleared prior to the Status Register being cleared, the ALERT pin will be reasserted.
4.7
SMBus Address
The EMC1422-1 responds to hard-wired SMBus slave address as shown in Table 1.1. Note: Other addresses are available. Contact SMSC for more information.
4.8
SMBus Timeout
The EMC1422 supports SMBus Timeout. If the clock line is held low for longer than 30ms, the device will reset its SMBus protocol. This function can be disabled by clearing the TIMEOUT bit in the Consecutive Alert Register (see Section 6.13).
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Chapter 5 Product Description
The EMC1422 is an SMBus temperature sensor with Hardware Thermal Shutdown. The EMC1422 monitors one internal diode and one externally connected temperature diode. Thermal management is performed in cooperation with a host device. This consists of the host reading the temperature data of both the external and internal temperature diodes of the EMC1422 and using that data to control the speed of one or more fans. The EMC1422 has two levels of monitoring. The first provides a maskable ALERT signal to the host when measured temperatures meet or exceed user programmable limits. This allows the EMC1422 to be used as an independent thermal watchdog to warn the host of temperature hot spots without direct control by the host. The second level of monitoring asserts the SYS_SHDN pin when the External Diode temperature exceeds a hardware specified threshold temperature. Additionally, the internal diodecan be configured to assert the SYS_SHDN pin when the measured temperature exceeds user programmable limits. Since the EMC1422 automatically corrects for temperature errors due to series resistance in temperature diode lines, there is greater flexibility in where external diodes are positioned and better measurement accuracy than previously available with non-resistance error correcting devices. The automatic beta detection feature means that there is no need to program the device according to which type of diode is present. This also includes CPU diodes that require the transistor or BJT model for monitoring their temperature. Therefore, the EMC1422 can power up ready to operate for any system configuration. Figure 5.1 shows a system level block diagram of the EMC1422.
CPU Thermal diode
EMC1422
DP1 DN1 Internal Diode
Host SMCLK SMDATA ALERT SYS_SHDN SMBus Interface
Power Control
Figure 5.1 System Diagram for EMC1422
5.0.1
Conversion Rates
The EMC1422 may be configured for different conversion rates based on the system requirements. The conversion rate is configured as described in Section 6.5. The default conversion rate is 4 conversions per second. Other available conversion rates are shown in Table 6.6.
5.0.2
Dynamic Averaging
Dynamic averaging causes the EMC1422 to measure the external diode channels for an extended time based on the selected conversion rate. This functionality can be disabled for increased power savings at the lower conversion rates (see Section 6.4). When dynamic averaging is enabled, the device will automatically adjust the sampling and measurement time for the external diode channels. This allows the device to average 2x or 16x longer than the normal 11 bit operation (nominally 21ms per channel)
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while still maintaining the selected conversion rate. The benefits of dynamic averaging are improved noise rejection due to the longer integration time as well as less random variation of the temperature measurement. When enabled, the dynamic averaging will affect the average supply current based on the chosen conversion rate as shown in Table 5.1 for the EMC1422.
Table 5.1 Supply Current vs. Conversion Rate for EMC1422 AVERAGING FACTOR (BASED ON 11-BIT OPERATION) ENABLED (DEFAULT) 16x 16x 8x 4x 2x 1x 0.5x
AVERAGE SUPPLY CURRENT ENABLED (DEFAULT) 365uA 625uA 660uA 725uA 730uA 745uA 775uA
CONVERSION RATE 1 / sec 2 / sec 4 / sec (default) 8 / sec 16 / sec 32 / sec 64 / sec
DISABLED 130uA 165uA 225uA 350uA 485uA 745uA 775uA
DISABLED 1x 1x 1x 1x 1x 1x 0.5x
5.1
SYS_SHDN Output
The SYS_SHDN output is asserted independently of the ALERT output and cannot be masked. If the External Diode temperature exceeds the Hardware Thermal Shutdown Limit for the programmed number of consecutive measurements, then the SYS_SHDN pin is asserted. The Hardware Thermal Shutdown Limit is defined at power-up via the pull-up resistors on the SYS_SHDN and ALERT pins as shown in Table 5.2. This limit cannot be modified or masked via software. In addition to External Diode channel triggering the SYS_SHDN pin when the measured temperature exceeds to the Hardware Thermal Shutdown Limit, each of the measurement channels can be configured to assert the SYS_SHDN pin when they exceed the corresponding THERM Limit. When the SYS_SHDN pin is asserted, it will not release until the External Diode temperature drops below the Hardware Thermal Shutdown Limit minus 10C and all other measured temperatures drop below the THERM Limit minus the THERM Hysteresis value (when linked to SYS_SHDN). Figure 5.2 shows a block diagram of the interaction between the input channels and the SYS_SHDN pin.
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Hardware Thermal Shutdown
Internal Diode
SMBus Traffic
Temperature Conversion and THERM Limit Compare H/W Thermal Shutdown Sensor Temperature Conversion 3.3V
Software Shutdown Enable
3.3V SW_SHDN
SYS_SHDN HW_SHDN ALERT Function Select
Figure 5.2 Block Diagram of Hardware Thermal Shutdown
5.2
Hardware Thermal Shutdown Limit
The Hardware Thermal Shutdown Limit temperature is determined by pull-up resistors on the SYS_SHDN and ALERT pins shown in Table 5.2.
Table 5.2 SYS_SHDN Threshold Temperature SYS_SHD
PULL-UP
PULL-UP
ALERT
4.7K OHM 10% 77C 78C 79C 80C 81C 82C
6.8K OHM 10% 83C 84C 85C 86C 87C 88C
10K OHM 10% 89C 90C 91C 92C 93C 94C
15K OHM 10% 95C 96C 97C 98C 99C 100C
22K OHM 10% 101C 102C 103C 104C 105C 106C
33K OHM 10% 107C 108C 109C 110C 111C 112C
4.7K OHM 10% 6.8K OHM 10% 10K OHM 10% 15K OHM 10% 22K OHM 10% 33K OHM 10%
5.3
ALERT Output
The ALERT pin is an open drain output and requires a pull-up resistor to VDD and has two modes of operation: interrupt mode and comparator Mode. The mode of the ALERT output is selected via the ALERT / COMP bit in the Configuration Register (see Section 6.4).
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5.3.1
ALERT Pin Interrupt Mode
When configured to operate in interrupt mode, the ALERT pin asserts low when an out of limit measurement (> high limit or < low limit) is detected on any diode or when a diode fault is detected. The ALERT pin will remain asserted as long as an out-of-limit condition remains. Once the out-of-limit condition has been removed, the ALERT pin will remain asserted until the appropriate status bits are cleared. The ALERT pin can be masked by setting the MASK bit. Once the ALERT pin has been masked, it will be de-asserted and remain de-asserted until the MASK bit is cleared by the user. Any interrupt conditions that occur while the ALERT pin is masked will update the Status Register normally. The ALERT pin is used as an interrupt signal or as an Smbus Alert signal that allows an SMBus slave to communicate an error condition to the master. One or more ALERT outputs can be hard-wired together.
5.3.2
ALERT Pin Comparator Mode
When the ALERT pin is configured to operate in comparator mode it will be asserted if any of the measured temperatures exceeds the respective high limit. The ALERT pin will remain asserted until all temperatures drop below the corresponding high limit minus the THERM Hysteresis value. When the ALERT pin is asserted in comparator mode, the corresponding high limit status bits will be set. Reading these bits will not clear them until the ALERT pin is deasserted. Once the ALERT pin is deasserted, the status bits will be automatically cleared. The MASK bit will not block the ALERT pin in this mode, however the individual channel masks (see Section 6.12) will prevent the respective channel from asserting the ALERT pin.
5.4
ALERT and SYS_SHDN Pin Considerations
Because of the decode method used to determine the Hardware Thermal Shutdown Limit, it is important that the pull-up resistance on both the ALERT and SYS_SHDN pins be within the tolerances shown in Table 5.2. Additionally, the pull-up resistor on the ALERT and SYS_SHDN pins must be connected to the same 3.3V supply that drives the VDD pin. For 15ms after power up, the ALERT and SYS_SHDN pins must not be pulled low or the Hardware Thermal Shutdown Limit will not be decoded properly. If the system requirements do not permit these conditions, then the ALERT and SYS_SHDN pins must be isolated from their respective busses during this time. One method of isolating this pin is shown in Figure 5.3.
+3.3V
+2.5 - 5V
VDD 1 DP1 2 DN1 3 SYS_SHDN 4
10 SMCLK 9 8 7 SMDATA ALERT GND
4.7K 33K
22K
Shared Alert/
Figure 5.3 Isolating ALERT and SYS_SHDN Pins
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5.5
Beta Compensation
The EMC1422 is configured to monitor the temperature of basic diodes (e.g. 2N3904), or CPU thermal diodes. It automatically detects the type of external diode (CPU diode or diode connected transistor) and determines the optimal setting to reduce temperature errors introduced by beta variation.Compensating for this error is also known as implementing the transistor or BJT model for temperature measurement. For discrete transistors configured with the collector and base shorted together, the beta is generally sufficiently high such that the percent change in beta variation is very small. For example, a 10% variation in beta for two forced emitter currents with a transistor whose ideal beta is 50 would contribute approximately 0.25C error at 100C. However for substrate transistors where the base-emitter junction is used for temperature measurement and the collector is tied to the substrate, the proportional beta variation will cause large error. For example, a 10% variation in beta for two forced emitter currents with a transistor whose ideal beta is 0.5 would contribute approximately 8.25C error at 100C.
5.6
Resistance Error Correction (REC)
Parasitic resistance in series with the external diodes will limit the accuracy obtainable from temperature measurement devices. The voltage developed across this resistance by the switching diode currents cause the temperature measurement to read higher than the true temperature. Contributors to series resistance are PCB trace resistance, on die (i.e. on the processor) metal resistance, bulk resistance in the base and emitter of the temperature transistor. Typically, the error caused by series resistance is +0.7C per ohm. The EMC1422 automatically corrects up to 100 ohms of series resistance.
APPLICATION NOTE: When monitoring a substrate transistor or CPU diode and beta compensation is enabled, the Ideality Factor should not be adjusted. Beta Compensation automatically corrects for most ideality errors.
5.7
Diode Faults
The EMC1422 detects an open on the DP and DN pins, and a short across the DP and DN pins. For each temperature measurement made, the device checks for a diode fault on the external diode channel(s). When a diode fault is detected, the ALERT pin asserts (unless masked, see Section 5.8) and the temperature data reads 00h in the MSB and LSB registers (note: the low limit will not be checked). A diode fault is defined as one of the following: an open between DP and DN, a short from VDD to DP, or a short from VDD to DN. If a short occurs across DP and DN or a short occurs from DP to GND, the low limit status bit is set and the ALERT pin asserts (unless masked). This condition is indistinguishable from a temperature measurement of 0.000degC (-64C in extended range) resulting in temperature data of 00h in the MSB and LSB registers. If a short from DN to GND occurs (with a diode connected), temperature measurements will continue as normal with no alerts.
5.8
Consecutive Alerts
The EMC1422 contains multiple consecutive alert counters. One set of counters applies to the ALERT pin and the second set of counters applies to the SYS_SHDN pin. Each temperature measurement channel has a separate consecutive alert counter for each of the ALERT and SYS_SHDN pins. All counters are user programmable and determine the number of consecutive measurements that a temperature channel(s) must be out-of-limit or reporting a diode fault before the corresponding pin is asserted. See Section 6.13 for more details on the consecutive alert function.
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5.9
Digital Filter
To reduce the effect of noise and temperature spikes on the reported temperature, the External Diode channel uses a programmable digital filter. This filter can be configured as Level 1, Level 2, or Disabled. The typical filter performance is shown in Figure 5.4 and Figure 5.5.
Filter Step Response
90 Temperature (C) 80 70 60 50 40 30 20 10 0 0 2 4 6 Samples 8 10 12 14
Disabled Level1 Level2
Figure 5.4 Temperature Filter Step Response
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Filter Impulse Response
90 80 Temperature (C) 70 60 50 40 30 20 10 0 0 2 4 6 8 10 12 14 Samples
Figure 5.5 Temperature Filter Impulse Response
Disabled
Level1 Level2
5.10
Temperature Monitors
In general, thermal diode temperature measurements are based on the change in forward bias voltage of a diode when operated at two different currents. This VBE is proportional to absolute temperature as shown in the following equation:
where:
V BE =
kT
q
I ln HIGH I LOW

k = Boltzmann's constant T = absolute temperature in Kelvin q = electron charge [1]
= diode ideality factor
Figure 5.6 shows a block diagram of the temperature measurement circuit. The negative terminal for the remote temperature diode, DN, is internally biased with a forward diode voltage referenced to ground.
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ILOW
IHIGH
Substrate PNP
DP Resistance Error Correction DN AntiAliasing Filter ADC
Figure 5.6 Block Diagram of Temperature Monitoring Circuit
5.11
Temperature Measurement Results and Data
The temperature measurement results are stored in the internal and external temperature registers. These are then compared with the values stored in the high and low limit registers. Both external and internal temperature measurements are stored in 11-bit format with the eight (8) most significant bits stored in a high byte register and the three (3) least significant bits stored in the three (3) MSB positions of the low byte register. All other bits of the low byte register are set to zero. The EMC1422 has two selectable temperature ranges. The default range is from 0C to +127C and the temperature is represented as binary number able to report a temperature from 0C to +127.875C in 0.125C steps. The extended range is an extended temperature range from -64C to +191C. The data format is a binary number offset by 64C. The extended range is used to measure temperature diodes with a large known offset (such as AMD processor diodes) where the diode temperature plus the offset would be equivalent to a temperature higher than +127C. Table 5.3 shows the default and extended range formats.
Table 5.3 EMC1422 Temperature Data Format EXTENDED RANGE RANGE -64C TO 191C 000 0000 0000 000 0000 0000 Note 5.2 001 1111 1111 010 0000 0000 010 0000 0001 010 0000 1000
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TEMPERATURE (C) Diode Fault -64 -1 0 0.125 1
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DEFAULT RANGE 0C TO 127C 000 0000 0000 000 0000 0000 000 0000 0000 000 0000 0000 Note 5.1 000 0000 0001 000 0000 1000
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Table 5.3 EMC1422 Temperature Data Format (continued) EXTENDED RANGE RANGE -64C TO 191C 100 0000 0000 100 0000 1000 101 1111 1000 101 1111 1111 110 0000 0000 111 1111 0000 111 1111 1000 111 1111 1111 Note 5.4
TEMPERATURE (C) 64 65 127 127.875 128 190 191 >= 191.875
DEFAULT RANGE 0C TO 127C 010 0000 0000 010 0000 1000 011 1111 1000 011 1111 1111 011 1111 1111 Note 5.3 011 1111 1111 011 1111 1111 011 1111 1111
Note 5.1 Note 5.2 Note 5.3 Note 5.4
In default mode, all temperatures < 0C will be reported as 0C. In the extended range, all temperatures < -64C will be reported as -64C. For the default range, all temperatures > +127.875C will be reported as +127.875C. For the extended range, all temperatures > +191.875C will be reported as +191.875C.
5.12
External Diode Connections
The EMC1422 is hard-wired to measure a specific kind of thermal diode and none of the measurement options can be changed by software. Figure 5.7 shows the different diode configurations.
to DP to DN
to DP
to DP
to DN Local Ground Typical remote substrate transistor i.e. CPU substrate PNP Typical remote discrete PNP transistor i.e. 2N3906
Figure 5.7 Diode Configurations
to DN
Typical remote discrete NPN transistor i.e. 2N3904
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Chapter 6 Register Description
The registers shown in Table 6.1 are accessible through the SMBus. An entry of `-' indicates that the bit is not used and will always read `0'.
Table 6.1 Register Set in Hexadecimal Order REGISTER ADDRESS 00h 01h 02h 03h DEFAULT VALUE 00h 00h 00h 00h Page 26 Page 27
R/W R R R R/W
REGISTER NAME Internal Diode Data High Byte External Diode Data High Byte Status Configuration
FUNCTION Stores the integer data for the Internal Diode Stores the integer data for the External Diode Stores the status bits for the Internal Diode and External Diodes Controls the general operation of the device (mirrored at address 09h) Controls the conversion rate for updating temperature data (mirrored at address 0Ah) Stores the 8-bit high limit for the Internal Diode (mirrored at address 0Bh) Stores the 8-bit low limit for the Internal Diode (mirrored at address 0Ch) Stores the integer portion of the high limit for the External Diode (mirrored at register 0Dh) Stores the integer portion of the low limit for the External Diode (mirrored at register 0Eh) Controls the general operation of the device (mirrored at address 03h) Controls the conversion rate for updating temperature data (mirrored at address 04h)
PAGE Page 26
04h
R/W
Conversion Rate
06h (4/sec) 55h (85C) 00h (0C) 55h (85C) 00h (0C) 00h
Page 28
05h
R/W
Internal Diode High Limit Internal Diode Low Limit External Diode High Limit High Byte External Diode Low Limit High Byte Configuration
Page 28
06h
R/W
07h
R/W
08h
R/W
09h
R/W
Page 27
0Ah
R/W
Conversion Rate
06h (4/sec)
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Table 6.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS 0Bh DEFAULT VALUE 55h (85C) 00h (0C) 55h (85C) 00h (0C) 00h 00h 00h 00h 00h 55h (85C) 00h Page 29 Page 30 Page 26 Page 29 Page 29 Page 28
R/W R/W
REGISTER NAME Internal Diode High Limit Internal Diode Low Limit External Diode High Limit High Byte External Diode Low Limit High Byte External Diode Data Low Byte Scratchpad Scratchpad External Diode High Limit Low Byte External Diode Low Limit Low Byte External Diode THERM Limit SYS_SHDN Configuration Hardware Thermal Shutdown Limit Channel Mask Register Internal Diode THERM Limit THERM Hysteresis Consecutive ALERT
FUNCTION Stores the 8-bit high limit for the Internal Diode (mirrored at address 05h) Stores the 8-bit low limit for the Internal Diode (mirrored at address 06h) Stores the integer portion of the high limit for the External Diode (mirrored at register 07h) Stores the integer portion of the low limit for the External Diode (mirrored at register 08h) Stores the fractional data for the External Diode Scratchpad register for software compatibility Scratchpad register for software compatibility Stores the fractional portion of the high limit for the External Diode Stores the fractional portion of the low limit for the External Diode Stores the 8-bit critical temperature limit for the External Diode Controls which software channels, if any, are linked to the SYS_SHDN pin When read, returns the selected Hardware Thermal Shutdown Limit Controls the masking of individual channels Stores the 8-bit critical temperature limit for the Internal Diode Stores the 8-bit hysteresis value that applies to all THERM limits Controls the number of out-of-limit conditions that must occur before an interrupt is asserted Stores the fractional data for the Internal Diode Status bits for the High Limits Status bits for the Low Limits Status bits for the THERM Limits
25
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0Ch
R/W
0Dh
R/W
0Eh
R/W
10h 11h 12h 13h 14h 19h 1Dh
R R/W R/W R/W R/W R/W R/W
1Eh 1Fh 20h 21h 22h
R R/W R/W R/W R/W
N/A 00h 55h (85C) 0Ah (10C) 70h
Page 31 Page 31 Page 29
Page 31
29h 35h 36h 37h
SMSC EMC1422
R R-C R-C R
Internal Diode Data Low Byte High Limit Status Low Limit Status THERM Limit Status
00h 00h 00h 00h
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1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
Table 6.1 Register Set in Hexadecimal Order (continued) REGISTER ADDRESS 40h FDh FEh FFh DEFAULT VALUE 00h Table 6.21 5Dh 01h
R/W R/W R R R
REGISTER NAME Filter Control Product ID SMSC ID Revision
FUNCTION Controls the digital filter setting for the External Diode channel Stores a fixed value that identifies each product Stores a fixed value that represents SMSC Stores a fixed value that represents the revision number
PAGE Page 34 Page 35 Page 35 Page 35
6.1
Data Read Interlock
When any temperature channel high byte register is read, the corresponding low byte is copied into an internal `shadow' register. The user is free to read the low byte at any time and be guaranteed that it will correspond to the previously read high byte. Regardless if the low byte is read or not, reading from the same high byte register again will automatically refresh this stored low byte data.
6.2
Temperature Data Registers
Table 6.2 Temperature Data Registers
ADDR 00h 29h 01h 10h
R/W R R R R
REGISTER Internal Diode High Byte Internal Diode Low Byte External Diode High Byte External Diode Low Byte
B7 128 0.5 128 0.5
B6 64 0.25 64 0.25
B5 32 0.125 32 0.125
B4 16 16 -
B3 8 8 -
B2 4 4 -
B1 2 2 -
B0 1 1 -
DEFAULT 00h 00h 00h 00h
As shown in Table 6.2, all temperatures are stored as an 11-bit value with the high byte representing the integer value and the low byte representing the fractional value left justified to occupy the MSBits.
6.3
Status Register
Table 6.3 Status Register
ADDR 02h
R/W R
REGISTER Status
B7 BUSY
B6 -
B5 -
B4 HIGH
B3 LOW
B2 FAULT
B1 THERM
B0 HWSD
DEFAULT 00h
The Status Register reports general error conditions. To identify specific channels, refer to Section 6.9, Section 6.14, Section 6.15, and Section 6.16. The individual Status Register bits are cleared when the appropriate High Limit, Low Limit, or THERM Limit register has been read or cleared.
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Bit 7 - BUSY - This bit indicates that the ADC is currently converting. This bit does not cause either the ALERT or THERM pin to be asserted. Bit 4 - HIGH - This bit is set when any of the temperature channels exceeds its programmed high limit. See the High Limit Status Register for specific channel information (Section 6.14). When set, this bit will assert the ALERT pin. Bit 3 - LOW - This bit is set when any of the temperature channels drops below its programmed low limit. See the Low Limit Status Register for specific channel information (Section 6.15). When set, this bit will assert the ALERT pin. Bit 2 - FAULT - This bit is asserted when a diode fault is detected on any of the external diode channels. See the External Diode Fault Register for specific channel information (Section 6.9). When set, this bit will assert the ALERT pin. Bit 1 - THERM - This bit is set when the any of the temperature channels exceeds its programmed THERM limit. See the THERM Limit Status Register for specific channel information (Section 6.16). Bit 0 - HWSD - This bit is set when the External Diode Temperature exceeds the Hardware Thermal Shutdown Limit set by the pull-up resistors on the ALERT and SYS_SHDN pins. When set, this bit will assert the SYS_SHDN pin.
6.4
Configuration Register
Table 6.4 Configuration Register
ADDR 03h 09h
R/W R/W
REGISTER Configuration
B7 MASK _ALL
B6 -
B5 ALERT/ COMP
B4 -
B3 -
B2 RANGE
B1 DAVG_ DIS
B0 -
DEFAULT 00h
The Configuration Register controls the basic operation of the device. This register is fully accessible at either address. Bit 7 - MASK_ALL - Masks the ALERT pin from asserting. `0' (default) - The ALERT pin is not masked. If any of the appropriate status bits are set the ALERT pin will be asserted. `1' - The ALERT pin is masked. It will not be asserted for any interrupt condition unless it is configured as a THERM pin. The Status Registers will be updated normally. Bit 5 - ALERT/COMP - Controls the operation of the ALERT pin. `0' (default) - The ALERT pin acts as described in Section 5.3. `1' - The ALERT pin acts in comparator mode as described in Section 5.3.2. In this mode the MASK_ALL bit is ignored. Bit 2 - RANGE - Configures the measurement range and data format of the temperature channels. `0' (default) - The temperature measurement range is 0C to +127.875C and the data format is binary. `1' -The temperature measurement range is -64C to +191.875C and the data format is offset binary (see Table 5.3). Bit 1 - DAVG_DIS - Disables the dynamic averaging feature on all temperature channels. `0' (default) - The dynamic averaging feature is enabled. All temperature channels will be converted with an averaging factor that is based on the conversion rate as shown in Table 5.1. `1' - The dynamic averaging feature is disabled. All temperature channels will be converted with a maximum averaging factor of 1x (equivalent to 11-bit conversion). For higher conversion rates, this averaging factor will be reduced as shown in Table 5.1.
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6.5
Conversion Rate Register
Table 6.5 Conversion Rate Register
ADDR 04h 0Ah
R/W R/W
REGISTER Conversion Rate
B7 -
B6 -
B5 -
B4 -
B3
B2
B1
B0
DEFAULT 06h (4/sec)
CONV[3:0]
The Conversion Rate Register controls how often the temperature measurement channels are updated and compared against the limits. This register is fully accessible at either address. Bits 3-0 - CONV[3:0] - Determines the conversion rate as shown in Table 6.6.
Table 6.6 Conversion Rate CONV[3:0] HEX 0h 1h 2h 3h 4h 5h 6h 7h 8h 9h Ah Bh - Fh 3 0 0 0 0 0 0 0 0 1 1 1 2 0 0 0 0 1 1 1 1 0 0 0 All others 1 0 0 1 1 0 0 1 1 0 0 1 0 0 1 0 1 0 1 0 1 0 1 0 CONVERSIONS / SECOND 1 1 1 1 1 2 4 (default) 8 16 32 64 1
6.6
Limit Registers
Table 6.7 Temperature Limit Registers
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
05h 0Bh 06h 0Ch
R/W
Internal Diode High Limit Internal Diode Low Limit
128
64
32
16
8
4
2
1
55h (85C) 00h (0C)
R/W
128
64
32
16
8
4
2
1
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1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
Table 6.7 Temperature Limit Registers (continued)
ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT
07h 0Dh 13h
R/W
External Diode High Limit High Byte External Diode High Limit Low Byte External Diode Low Limit High Byte External Diode Low Limit Low Byte
128
64
32
16
8
4
2
1
55h (85C)
R/W
0.5
0.25
0.125
-
-
-
-
-
00h
08h 0Eh 14h
R/W
128
64
32
16
8
4
2
1
00h (0C)
R/W
0.5
0.25
0.125
-
-
-
-
-
00h
The device contains both high and low limits for all temperature channels. If the measured temperature exceeds the high limit, then the corresponding status bit is set and the ALERT pin is asserted. Likewise, if the measured temperature is less than or equal to the low limit, the corresponding status bit is set and the ALERT pin is asserted. The data format for the limits must match the selected data format for the temperature so that if the extended temperature range is used, the limits must be programmed in the extended data format. The limit registers with multiple addresses are fully accessible at either address.
6.7
Scratchpad Registers
Table 6.8 Scratchpad Register
ADDR 11h 12h
R/W R/W R/W
REGISTER Scratchpad Scratchpad
B7 7 7
B6 6 6
B5 5 5
B4 4 4
B3 3 3
B2 2 2
B1 1 1
B0 0 0
DEFAULT 00h 00h
The Scratchpad Registers are Read Write registers that are used for place holders to be software compatible with legacy programs. Reading from the registers will return what is written to them.
6.8
Therm Limit Registers
Table 6.9 Therm Limit Registers
ADDR. 19h
R/W R/W
REGISTER External Diode THERM Limit Internal Diode THERM Limit
B7 128
B6 64
B5 32
B4 16
B3 8
B2 4
B1 2
B0 1
DEFAULT 55h (85C) 55h (85C)
20h
R/W
128
64
32
16
8
4
2
1
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1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
Table 6.9 Therm Limit Registers (continued) ADDR. 21h R/W R/W REGISTER THERM Hysteresis B7 128 B6 64 B5 32 B4 16 B3 8 B2 4 B1 2 B0 1 DEFAULT 0Ah (10C)
6.9
External Diode Fault Register
Table 6.10 External Diode Fault Register
ADDR.
R/W
REGISTER External Diode Fault
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
-
FLT 00h
1Bh
R-C
The External Diode Fault Register indicates which of the external diodes caused the FAULT bit in the Status Register to be set. This register is cleared when it is read. Bit 1 - FLT - This bit is set if the External Diode channel reported a diode fault.
6.10
Software Thermal Shutdown Configuration Register
Table 6.11 Software Thermal Shutdown Configuration Register
ADDR.
R/W
REGISTER Software Thermal Shutdown Configuration
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
-
EXTSYS INTSYS 00h
1Dh
R/W
The Software Thermal Shutdown Configuration Register controls whether any of the software channels will assert the SYS_SHDN pin. If a channel is enabled, the temperature is compared against the corresponding THERM Limit. If the measured temperature exceeds the THERM Limit, then the SYS_SHDN pin is asserted. This functionality is in addition to the Hardware Shutdown circuitry. Bit 1 - EXTSYS - configures the External Diode channel to assert the SYS_SHDN pin based on the THERM Limit. `0' (default) - the External Diode channel is not linked to the SYS_SHDN pin. If the temperature exceeds the THERM Limit, the ETHERM status bit is set but the SYS_SHDN pin is not asserted. `1' - the External Diode channel is linked to the SYS_SHDN pin. If the temperature exceeds the THERM Limit, the ETHERM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below the THERM Limit minus the THERM Hysteresis. Bit 0 - INTSYS - configures the Internal Diode channel to assert the SYS_SHDN pin based on it's respective THERM Limit. `0' (default) - the Internal Diode channel is not linked to the SYS_SHDN pin. If the temperature exceeds it's THERM Limit, the ITHERM status bit is set but the SYS_SHDN pin is not asserted. `1' - the Internal Diode channel is linked to the SYS_SHDN pin. If the temperature exceeds it's THERM Limit, the ITHERM status bit is set and the SYS_SHDN pin is asserted. It will remain asserted until the temperature drops below it's THERM Limit minus the THERM Hysteresis.
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6.11
Hardware Thermal Shutdown Limit Register
Table 6.12 Hardware Thermal Shutdown Limit Register
ADDR. 1Eh
R/W R
REGISTER Hardware Thermal Shutdown Limit
B7 128
B6 64
B5 32
B4 16
B3 8
B2 4
B1 2
B0 1
DEFAULT N/A
This read only register returns the Hardware Thermal Shutdown Limit selected by the value of the pullup resistors on the ALERT and SYS_SHDN pins. The data represents the hardware set temperature in C using the active temperature setting set by the RANGE bit in the Configuration Register. See Table 5.3 for the data format. When the External Diode Temperature exceeds this limit, the SYS_SHDN pin is asserted and will remain asserted until the External Diode Temperature drops below this limit minus 10C.
6.12
Channel Mask Register
Table 6.13 Channel Mask Register
ADDR.
R/W
REGISTER Channel Mask
B7
B6
B5
B4
B3
B2
B1 E MASK
B0 INT MASK
DEFAULT
-
-
1Fh
R/W
00h
The Channel Mask Register controls individual channel masking. When a channel is masked, the ALERT pin will not be asserted when the masked channel reads a diode fault or out of limit error. The channel mask does not mask the SYS_SHDN pin. Bit 1 - EMASK - Masks the ALERT pin from asserting when the External Diode channel is out of limit or reports a diode fault. `0' (default) - The External Diode channel will cause the ALERT pin to be asserted if it is out of limit or reports a diode fault. `1' - The External Diode channel will not cause the ALERT pin to be asserted if it is out of limit or reports a diode fault. Bit 0 - INTMASK - Masks the ALERT pin from asserting when the Internal Diode temperature is out of limit. `0' (default) - The Internal Diode channel will cause the ALERT pin to be asserted if it is out of limit. `1' - The Internal Diode channel will not cause the ALERT pin to be asserted if it is out of limit.
6.13
Consecutive ALERT Register
Table 6.14 Consecutive ALERT Register
ADDR. 22h
R/W R/W
REGISTER Consecutive ALERT
B7 TIME OUT
B6
B5 CTHRM[2:0]
B4
B3
B2 CALRT[2:0]
B1
B0 -
DEFAULT 70h
The Consecutive ALERT Register determines how many times an out-of-limit error or diode fault must be detected in consecutive measurements before the ALERT or SYS_SHDN pin is asserted. Additionally, the Consecutive ALERT Register controls the SMBus Timeout functionality.
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An out-of-limit condition (i.e. HIGH, LOW, or FAULT) occurring on the same temperature channel in consecutive measurements will increment the consecutive alert counter. The counters will also be reset if no out-of-limit condition or diode fault condition occurs in a consecutive reading. When the ALERT pin is configured as an interrupt, when the consecutive alert counter reaches its programmed value, the following will occur: the STATUS bit(s) for that channel and the last error condition(s) (i.e. EHIGH) will be set to `1', the ALERT pin will be asserted, the consecutive alert counter will be cleared, and measurements will continue. When the ALERT pin is configured as a comparator, the consecutive alert counter will ignore diode fault and low limit errors and only increment if the measured temperature exceeds the High Limit. Additionally, once the consecutive alert counter reaches the programmed limit, the ALERT pin will be asserted, but the counter will not be reset. It will remain set until the temperature drops below the High Limit minus the THERM Hysteresis value. For example, if the CALRT[2:0] bits are set for 4 consecutive alerts, the high limits are set at 70C, and none of the channels are masked, then the ALERT pin will be asserted after the following four measurements: 1. Internal Diode reads 71C and the external diode reads 69C. Consecutive alert counter for INT is incremented to 1. 2. Both the Internal Diode and the External Diode read 71C. Consecutive alert counter for INT is incremented to 2and for EXT is set to 1. 3. The External Diode reads 71C and the Internal Diode reads 69C. Consecutive alert counter for INT is cleared and EXT is incremented to 2. 4. The Internal Diode reads 71C and the external diode reads 71C. Consecutive alert counter for INT is set to 1 and EXT is incremented to 3. 5. The Internal Diode reads 71C and the external diode reads 71C. Consecutive alert counter for INT is incremented to 2 and EXT is incremented to 4. The appropriate status bits are set for EXT and the ALERT pin is asserted. EXT counter is reset to 0 and all other counters hold the last value until the next temperature measurement. Bit 7 - TIMEOUT - Determines whether the SMBus Timeout function is enabled. `0' (default) - The SMBus Timeout feature is disabled. The SMCLK line can be held low indefinitely without the device resetting its SMBus protocol. `1' - The SMBus Timeout feature is enabled. If the SMCLK line is held low for more than 30ms, then the device will reset the SMBus protocol. Bits 6-4 CTHRM[2:0] - Determines the number of consecutive measurements that must exceed the corresponding THERM Limit and Hardware Thermal Shutdown Limit before the SYS_SHDN pin is asserted. All temperature channels use this value to set the respective counters. The consecutive THERM counter is incremented whenever any of the measurements exceed the corresponding THERM Limit or if the External Diode measurement exceeds the Hardware Thermal Shutdown Limit. If the temperature drops below the THERM limit or Hardware Thermal Shutdown Limit, then the counter is reset. If the programmed number of consecutive measurements exceed the THERM Limit or Hardware Thermal Shutdown Limit, and the appropriate channel is linked to the SYS_SHDN pin, then the SYS_SHDN pin will be asserted low. Once the SYS_SHDN pin is asserted, the consecutive THERM counter will not reset until the corresponding temperature drops below the appropriate limit minus the corresponding hysteresis. The bits are decoded as shown in Table 6.15. The default setting is 4 consecutive out of limit conversions. Bits 3-1 - CALRT[2:0] - Determine the number of consecutive measurements that must have an out of limit condition or diode fault before the ALERT pin is asserted. All temperature channels use this value to set the respective counters. The bits are decoded as shown in Table 6.15. The default setting is 1 consecutive out of limit conversion.
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1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
Table 6.15 Consecutive Alert / THERM Settings NUMBER OF CONSECUTIVE OUT OF LIMIT MEASUREMENTS 1 (default for CALRT[2:0]) 2 3 4 (default for CTHRM[2:0])
2 0 0 0 1
1 0 0 1 1
0 0 1 1 1
APPLICATION NOTE: When measuring a 65nm Intel CPUs, the Ideality Setting should be the default 12h. When measuring 45nm Intel CPUs, the Ideality Setting should be 15h.
6.14
High Limit Status Register
Table 6.16 High Limit Status Register
ADDR.
R/W
REGISTER High Limit Status
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
35h
R-C
-
-
-
-
-
-
EHIGH
IHIGH
00h
The High Limit Status Register contains the status bits that are set when a temperature channel high limit is exceeded. If any of these bits are set, then the HIGH status bit in the Status Register is set. Reading from the High Limit Status Register will clear all bits if. Reading from the register will also clear the HIGH status bit in the Status Register. The ALERT pin will be set if the programmed number of consecutive alert counts have been met and any of these status bits are set. The status bits will remain set until read unless the ALERT pin is configured as a comparator output (see Section 5.3.2). Bit 1 - EHIGH - This bit is set when the External Diode channel exceeds its programmed high limit. Bit 0 - IHIGH - This bit is set when the Internal Diode channel exceeds its programmed high limit.
6.15
Low Limit Status Register
Table 6.17 Low Limit Status Register
ADDR.
R/W
REGISTER Low Limit Status
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
36h
R-C
-
-
-
-
-
-
ELOW
ILOW
00h
The Low Limit Status Register contains the status bits that are set when a temperature channel drops below the low limit. If any of these bits are set, then the LOW status bit in the Status Register is set. Reading from the Low Limit Status Register will clear all bits. Reading from the register will also clear the LOW status bit in the Status Register. The ALERT pin will be set if the programmed number of consecutive alert counts have been met and any of these status bits are set.
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1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
The status bits will remain set until read unless the ALERT pin is configured as a comparator output (see Section 5.3.2). Bit 1 - ELOW - This bit is set when the External Diode channel drops below its programmed low limit. Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.
6.16
THERM Limit Status Register
Table 6.18 THERM Limit Status Register
ADDR.
R/W
REGISTER THERM Limit Status
B7
B6
B5
B4
B3 -
B2
B1 E THERM
B0
DEFAULT
-
37h
R-C
-
-
-
-
ITHERM
00h
The THERM Limit Status Register contains the status bits that are set when a temperature channel THERM Limit is exceeded. If any of these bits are set, then the THERM status bit in the Status Register is set. Reading from the THERM Limit Status Register will not clear the status bits. Once the temperature drops below the THERM Limit minus the THERM Hysteresis, the corresponding status bits will be automatically cleared. The THERM bit in the Status Register will be cleared when all individual channel THERM bits are cleared. Bit 1 - ETHERM - This bit is set when the External Diode channel exceeds it's programmed THERM limit. Bit 0- ITHERM - This bit is set when the Internal Diode channel exceeds it's programmed THERM limit.
6.17
Filter Control Register
Table 6.19 Filter Configuration Register
ADDR. 40h
R/W R/W
REGISTER Filter Control
B7 -
B6 -
B5 -
B4 -
B3 -
B2 -
B1
B0
DEFAULT 00h
FILTER[1:0]
The Filter Configuration Register controls the digital filter on the External Diode channel. Bits 1-0 - FILTER[1:0] - Control the level of digital filtering that is applied to the External Diode temperature measurements as shown in Table 6.20. See Figure 5.4and Figure 5.5 for examples on the filter behavior.
Table 6.20 Filter Settings FILTER[1:0] 1 0 0 1 1 0 0 1 0 1 Disabled (default) Level 1 Level 1 Level 2 AVERAGING
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1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
6.18
Product ID Register
Table 6.21 Product ID Register
ADDR FDh
R/W R
REGISTER Product ID
B7 0
B6 0
B5 1
B4 0
B3 0
B2 0
B1 1
B0 0
DEFAULT 22h EMC1422
The Product ID Register holds a unique value that identifies the device.
6.19
SMSC ID Register (FEh)
Table 6.22 Manufacturer ID Register
ADDR. FEh
R/W R
REGISTER SMSC ID
B7 0
B6 1
B5 0
B4 1
B3 1
B2 1
B1 0
B0 1
DEFAULT 5Dh
The Manufacturer ID register contains an 8 bit word that identifies the SMSC as the manufacturer of the EMC1422.
6.20
Revision Register (FFh)
Table 6.23 Revision Register
ADDR. FFh
R/W R
REGISTER Revision
B7 0
B6 0
B5 0
B4 0
B3 0
B2 0
B1 0
B0 1
DEFAULT 01h
The Revision register contains an 8 bit word that identifies the die revision.
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1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
Chapter 7 Typical Operating Curves
Tem perature Error vs. Filter Capacitor (2N3904, TA = 27C, TDIODE = 27C, VDD = 3.3V) 1.0 Temperature Error (C)
Tem perature Error vs. Am bient Tem perature (2N3904, TDIODE = 42.5C, VDD = 3.3V) 1.0 0.8 Temperature Error (C) 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 -40 -25 -10 5 20 35 50 65 80 Am bient Tem perature (C) 95 110 125
0.8 0.5 0.3 0.0 -0.3 -0.5 -0.8 -1.0 0 1000 2000 Filter Capacitor (pF) 3000 4000
Tem perature Error vs. External Diode Tem perature (2N3904, TA = 42.5C, VDD = 3.3V) 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 -40 -25 -10 5 20 35 50 65 80 95 External Diode Tem perature (C)
5
Temperature Error (C)
Temperature Error vs. CPU Temperature Typical 65nm CPU from major vendor (TA = 27C, VDD = 3.3V, BETA = 011, CFILTER = 470pF)
Beta Compensation Disabled
Temperature Error (C)
4 3 2 1 0
Beta Compensation Enabled
-1 20 40 60 80 100 120
110 125
CPU Temperature (C)
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1C Temperature Sensor with Hardware Thermal Shutdown Datasheet
Temperature E rror vs. Series R esistance 1.0
Temperature Error (C) REC Enabled
Supply Current vs. Conversion Rate
120 100
REC Disabled
1200 1100 1000 900 800 700 600 500 400 300 200 1 2 4 8 16 32 64 Conversion Rate
0.8 0.6 0.4 0.2 0.0 0 50 100 Series R (Ohm) 150
REC Enabled
Supply Current (uA)
80 60 40 20 0 200
Temperature Error (C) REC Disabled
Dynamic Averaging Enabled Dynamic Averaging Disabled
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1C Temperature Sensor with Hardware Thermal Shutdown
Datasheet
REVISION HISTORY
REVISION DESCRIPTION SEE SPEC FRONT PAGE FOR REVISION HISTORY DATE RELEASED BY -
3 D e PIN 1 IDENTIFIER AREA (D/2 X E1/2) 5 c
-
3
E1
E
2 8X b
SEE DETAIL "A"
TOP VIEW
END VIEW
C
A
SEATING PLANE A1 ccc C
SIDE VIEW
3-D VIEW
NOTES: 1. ALL DIMENSIONS ARE IN MILLIMETER. 2. TOLERANCE ON THE TRUE POSITION OF THE LEADS IS 0.065mm MAXIMUM. 3. PACKAGE BODY DIMENSIONS "D" AND "E1" DO NOT INCLUDE MOLD PROTRUSIONS OR FLASH. MAXIMUM MOLD PROTRUSIONS OR FLASH IS 0.15 mm (0.006 INCHES) PER END AND SIDE. DIMENSIONS "D" AND "E1" ARE DETERMINED AT DATUM PLANE "H". 4. DIMENSION FOR FOOT LENGTH "L" IS MEASURED AT THE GAUGE PLANE 0.25mm ABOVE THE SEATING PLANE. 5. DETAILS OF PIN 1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
H C 0.25 SEATING PLANE 0 - 8 4 L L1
GAUGE PLANE
UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN MILLIMETERS AND TOLERANCES ARE: DECIMAL 0.1 X.X X.XX 0.05 X.XXX 0.025 ANGULAR 1
THIRD ANGLE PROJECTION
80 ARKAY DRIVE HAUPPAUGE, NY 11788 USA
TITLE
DETAIL "A"
SCALE: 3/1
DIM AND TOL PER ASME Y14.5M - 1994
MATERIAL
NAME
DRAWN
DATE
-
S.K.ILIEV
CHECKED
7/05/04 7/05/04
SCALE
PACKAGE OUTLINE 8 PIN TSSOP, 3x3 MM BODY, 0.65 MM PITCH
DWG NUMBER REV
FINISH
S.K.ILIEV
APPROVED
MO-8-TSSOP-3x3
STD COMPLIANCE SHEET
D
Figure 8.1 8 Pin MSOP / TSSOP Package
SMSC EMC1422
PRINT WITH "SCALE TO FIT" DO NOT SCALE DRAWING
S.K.ILIEV
7/07/04
1:1
JEDEC: MO-187 / D
1 OF 1
38 DATASHEET
A2
Revision 1.24 (02-05-08)
Chapter 8 Package Information

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